Automotive Microcontroller Unit (MCU) Industry Report, 2025

Research on automotive MCUs: the independent, controllable supply chain for automotive MCUs is rapidly maturing

Mid-to-high-end MCUs for intelligent vehicle control are a key focus of domestic products replacing foreign ones.

In the trends towards software-defined vehicles, intelligence, and electrification, the intelligent vehicle control sector has higher requirements for high-performance, high-reliability automotive MCUs. It is estimated that in 2027, the penetration rate of ""quasi-central + zonal"" architecture in China's passenger cars will hit 16.3%, and that of “central + zonal” architecture will reach 14.3%, giving a big boost to the demand for mid-to-high-end automotive MCUs.

Currently, automotive MCU process nodes are primarily at 40nm and above, and mature. With the evolution of EEA, some advanced automotive MCU products will increasingly adopt 28/22nm process or even more advanced 16/18nm.

Mid-to-high-end MCUs for intelligent vehicle control are mainly deployed in zone control units (ZCU), central domain control units (XCU), autonomous driving and power/chassis domain control units, and central computing units (CCU). Application scenarios include electric power steering systems, electronic stability control systems, suspension systems, anti-lock braking systems, airbag systems, new energy vehicle inverters, and battery management systems. Companies like Infineon and Renesas dominate the high-end markets of autonomous driving and power/chassis domains with TC4x and RH850 series, which already cover 16-28nm process nodes.

Meanwhile, some Chinese chip vendors have gradually made technological breakthroughs and had the ability to replace their foreign peers in mid-to-high-end MCUs for intelligent vehicle control:

SemiDrive: In April 2022, SemiDrive launched its high-performance MCU product, the E3 Series. The chips and key grouped software have passed ISO 26262 ASIL D functional safety product certification and China's Class II cryptographic certification, with hardware security modules supporting high-level information security. The E3 Series is now widely used in core areas such as zone control, body control, electric drive, battery management system (BMS), intelligent chassis, and ADAS, and incorporates mass-production experience in critical vehicle applications. With shipments up to millions of units, it has been mass-produced for over 40 mainstream vehicle models.

Chipsea: In 2024, it launched CS32F036Q, a 32-bit general-purpose automotive MCU compliant with AEC-Q100 Grade 2.

C*Core Technology: CCFC2003PT and CCFC2006PT series chips have been an alternative to engine control MCUs.

Tongxin Micro: The THA6 series, ASIL-D certified, has entered the power domain market.

In 2024, SemiDrive further improved its E3 series product lineup, focusing on the next-generation zone control units (ZCU), and introduced a ZCU cooperative solution targeting core application scenarios in zonal EEA, including body control, body + chassis + power cross-domain integration, and super power domain control. Using CPU/NVM and available GPIO as transverse and longitudinal axes, this portfolio includes the E3119, E3620B, E3650, and E3800.

First Tier: E3119/E3118/E3119-IOE
IO and IO-rich products capable of supporting development of entry-level ZCUs for traditional gateways, body control, and anti-pinch applications.
Compact packaging, supporting SMP and FOTA, and 10x CANFD and 1x Gbit, with up to 326 IOs, and also paired with second- or third-tier products.

Second Tier: E3620B
Primarily used for advanced integrated ZCUs, enabling further integration of power and chassis domains, and also paired with first- or third-tier products.
Hardware-level communication engine SSDPE and multi-channel Gbit transmission capacity.

Third Tier: E3650
Balance computing power, storage, high functionality, low power consumption, low communication latency, and ring network capabilities, making it the preferred choice in 48V domain controller platforms. It can also be paired with first-tier products.
Feature a multi-core high-compute cluster, the largest number of available GPIOs on the market, leading virtualized mass-production experience, hardware-level communication engine SSDPE, and multi-channel Gbit transmission capacity.

Fourth Tier: E3800
Super power domain integration, featuring more scenario-specific acceleration co-processors and more advanced high-speed interfaces.

Among them, the flagship MCU product for intelligent control, E3650, is specifically designed for application scenarios such as zone control units (ZCU) and domain control units (DCU).

Nearly a 40% surge in computing power, and a 30% expansion in storage capacity: It adopts the latest ARM Cortex R52+ high-performance lockstep multi-core cluster, with main frequency up to 600MHz, the highest in its class, and packs the largest storage capacity in the same tier.

30% more available peripherals and GPIOs: It integrates multiple peripheral BOM devices and is configured with the largest number of available GPIOs on the market, significantly reducing various peripheral IO expansion chips required for the system.

50% improvement in low-power performance: It features a built-in hardware communication acceleration engine that offloads communication task processing in domain control, reducing packet loss and latency while significantly lowering the load on the main CPU.

Ceiling-level information security protection: It integrates the SemiDrive Xuanwu Ultra-Secure HSM (Hardware Security Module), and supports OEMs’ customized and complex encryption/decryption algorithms. It complies with ISO 21434, Evita Full, and higher information security standards, and meets both domestic and overseas high-level security standards.

Additionally, E3650 has been specifically optimized for virtualization (Hypervisor) support on MCU systems, offering a production-ready virtual solution to help OEMs achieve efficient business isolation and code integration. E3650 not only covers four core application scenarios of intelligent driving/intelligent cockpit, power domain control, VMC chassis domain control, and zone control unit, but also reduces BOM costs by nearly 60% (varying by system design) thanks to its higher integration level. Currently, E3650 has officially begun customer sampling and has been designated by multiple leading OEMs.

RISC-V architecture is bringing new opportunities in automotive MCU market, and Chinese players work to build an independent, controllable supply chain.

Core architectures for automotive MCUs are relatively diverse. Mainstream ARM architecture-based processors currently dominate the global market in intelligent cockpits, vehicle entertainment, and ADAS, but their percentage in body domain controller, chassis, and powertrain applications is relatively small, where Power PC and Infineon TriCore architectures prevail.

With the rise of the new open-source RISC-V architecture, Chinese and foreign IP suppliers have launched over a dozen series of automotive-grade IPs, covering general-purpose, high-performance MCUs and security chip IPs, and basically meeting current demand for automotive control chips. On this basis, chip vendors are now developing high-performance RISC-V chips for body, powertrain, and chassis applications.

In 2023, Qualcomm, NXP, Bosch, Infineon, and Nordic Semiconductor jointly invested in a company aimed at advancing the adoption of RISC-V. The company will be a single source to enable compatible RISC-V based products, provide reference architectures, and help establish solutions widely used in the industry. Initial application focus will be automotive.

In 2024, Renesas announced R9A02G021, the industry’s first general-purpose 32-bit RISC-V-based microcontroller (MCU), designed to withstand harsh conditions. Consuming extremely low power in standby, it provides 128KB of fast flash memory, 16KB of SRAM memory and 4KB of flash memory for data storage.
In 2025, Infineon plans to introduce RISC-V into the automotive MCU market, launch a new family under its AURIX brand, and accelerate ecosystem establishment via a virtual prototype.

RISC-V is an open, reduced instruction set computer (RISC)-based instruction set architecture (ISA) designed to serve as a general-purpose computer architecture. Embracing an open-source design philosophy, RISC-V allows anyone to view, use, modify, and distribute its design. The goal is to provide a flexible, scalable, and high-performance computer architecture suitable for a wide range of applications. Key benefits include low development threshold, low licensing costs, high software portability, independent controllability, and flexibility and customization capabilities for proprietary chips.

To be applied in automotive electronics, the following conditions must be met:
Safety and Reliability: RISC-V implementation must comply with stringent industry safety standards, such as ISO 26262 functional safety certification, to be considered for critical applications.
Ecosystem and Support: The availability of a robust and mature ecosystem (including tools, software, and support) has a big impact on the adoption of RISC-V in the automotive sector.
Industry Acceptance: OEMs and Tier1 suppliers transitioning to RISC-V in hardware and software system design may require extensive testing, verification, and assurances of long-term support.
Cost and Licensing: With open-source nature, RISC-V remains superior in licensing costs, but its overall system cost (including development, integration, and support) should remain competitive.

China is striving to develop RISC-V architecture MCUs. Companies like HPMicro, Nanjing Cercis Semiconductor, Wuhan Binary Semiconductor, Chipext, and ESWIN Computing are facilitating the deployment of RISC-V-based MCUs in vehicles and expanding the application areas.

HPMicro: Andes Technology, Jingwei HiRain, and HPMicro have collaborated to integrate the AndesCore™ RISC-V processor series, HPMicro’s full range of HPM6200 products, and Jingwei HiRain’s Vehicle OS software platform solution to jointly build a RISC-V ecosystem in automotive chips. HPMicro has completed ISO 9001 quality management certification and ISO 26262 ASIL D functional safety management system certification. The full HPM6200 product line has passed AEC-Q100 Grade 1 certification, with an operating temperature range of -40°C to 125°C.
•Cercis Semiconductor: The Cercis M100 achieves a CoreMark score of up to 2.42 (CPU performance), actual benchmark results of up to 2.42 Coremark/MHz, and quicker overall response. It meets automotive ASIL-B requirements, supports Chinese cryptographic standards (SM2/3/4) with its hardware security module (HSM), and complies with the ISO 21434 cybersecurity standard. Great Wall Motor plans to widely adopt the chip in its multiple vehicle models, expected to be no less than 2.5 million units over the next five years.